AI and Microelectronics – Reliability Perspective
Prof. Dr. Milos Krstic
IHP Microelectronics, Frankfurt (Oder)
University of Potsdam, Potsdam
Germany
Prof. Dr. Milos Krstic received the Dr-Ing. degree in electronics from Brandenburg University of Technology, Cottbus, Germany in 2006. Since 2001 he has been with IHP, Frankfurt (Oder), Germany, where he leads the department System Architectures. From 2016 he is also professor for “Design and Test Methodology” at the University of Potsdam. For the last few years, his work was mainly focused on communication system architectures, fault tolerant circuits and design methodologies for digital systems integration. Prof. Krstic has been managing many international and national R & D projects (GALAXY, EMPHASE, BB-KI-Chips, IC-NAO, ENROL, RTU-ASIC, SEPHY, DIFFERENT, VHiSSi, RESCUE, MORAL, BB-KI Chips, etc.). He has published more than 300 journal and conference papers, and registered 12 patents.
Abstract — In the last years we have witnessed the unprecedented development of AI in various application domains. From automated driving, to translation services and ChatGPT, AI became the everyday part of lives. Nevertheless, the principles which have been used for AI are known for decades, and the enabler which brought this technology again in the focus is the microelectronics. Technology scaling, power optimization, possibilities for heterointegration and fast interfaces, have enabled the implementation of very complex Deep Neural Networks (DNNs). On the other hand, AI processing is still coupled with very intensive processing, where “unreliable” emerging solutions are explored (such as use of the memristors) and used in the applications where reliability plays significant role (such as in AI for automotive or space applications).
This talk will address this exciting link of AI and microelectronics from reliability perspective. First of all, the reliability of the AI processing hardware will be analysed. On one hand, we will evaluate the reliability of classical digital Deep Learning Accelerator (DLA) but also, on the other hand, we demonstrate important reliability challenges of the hardware accelerators in mixed-signal domain based on memristive crossbar array. Finally, it will be demonstrated that AI could be used in the process of the reliability evaluation of the circuits, with the help of Graph Neural Networks (GNNs).